Monocrystalline solid state materials such as single-crystal semiconductors are the basis of the current microelectronics industry. Solid state materials are characterized by a variety of properties, for example, electrical properties such as electrical conductivity or charge mobility, optical properties such as refractive index or speed of photons, thermal properties such as thermal conductivity or thermal expansion, mechanical properties such as stress or strain curves, and chemical properties such as resistance to corrosion or reaction consistency, among others.
Over the past years, the semiconductor industry has constantly explored new ways of increasing the amount of active surface area on the integrated circuit chips, particularly on those employing monocrystalline semiconductor substrates.
Accordingly, attempts to modify the electrical, optical, thermal and/or mechanical properties of such monocrystalline substrates have been made in an effort to minimize the dimensions of the IC devices, while maximizing the corresponding available active area. For example, new epitaxial growth processes such as the Epitaxial Lateral Overgrowth (ELO) have been used in an attempt to extend the amount of surface area available to active devices. However, these growth processes had limited results mainly because they consume part of the precious surface areas for seeding purposes, defeating therefore the primary purpose of increasing the available active area.
Another technology proposed by the semiconductor industry is the so-called Silicon-On-Insulator (SOI) process, wherein oxygen atoms are implanted at high dose and energy to form a silicon dioxide insulating layer between the upper surface of the original monocrystalline substrate and the bottom bulk portion of the same substrate. Although the SOI devices have many advantages, such as reduced parasitic capacitance due to the buried insulating layer, the process is relatively expensive because of the high costs of implanting the oxygen atoms and curing of the implant-induced defects.
Accordingly, there is a need for an improved method of increasing the available active surface area on integrated circuit chips fabricated on monocrystalline substrates. There is also a need for a more advantageous method of forming monocrystalline superconducting substrates for low power and high speed microelectronics devices, as well as a method for minimizing the cost of fabricating such substrates. There is further a need for an improved metallization scheme which facilitates the formation of active devices on SOI substrates and on the more novel Silicon-On-Nothing (SON) substrates.